Welcome to ISQED 2013

Welcome Notes

Ali Iranmanesh General Chair On behalf of the ISQED 2003 conference and technical committees, we are pleased to welcome you to the 4 International Symposium on Quality Electronic Design, ISQED 2003. Due to the overwhelming success of the first 3 conferences, despite the slump in the IC industry last year, and the unique value that it offers, IEEE ISQED is gaining recognition in both academia an...

Memory Bus Encoding for Low Power: A Tutorial

Design Considerations of Scaled Sub-0.1 ?m PD/SOI CMOS Circuits

PDL: A New Physical Synthesis Methodology

In this paper, we propose a new physical synthesis methodology, PDL, which relaxes the timing constraints to obtain best optimality in terms of layout quality and timing quality. It provides a common database for delay calculation, logic optimization, placement, and routing tools so that they can work and interact closely. We present results on industrial circuits showing the efficacy of this m...

Hetero2 3D integration: A scheme for optimizing efficiency/cost of Chip Multiprocessors

Timing the transition of a processor design to a new technology poses a provocative tradeoff. On the one hand, transitioning as early as possible offers a significant competitive advantage, by bringing improved designs to market early. On the other hand, an aggressive strategy may prove to be unprofitable, due to the low manufacturing yield of a technology that has not had time to mature. We pr...